CAPC - Part 4


After digging through labs vs chapters amongst the new and old course material I decided to divide my work up into my own seperations called parts. Otherwise this would have been lab 5/6 and I don't know where I lost lab 4.

The LDG Instruction

I initially had some trouble understanding the instructions, but since I knew what the goal to this part was I simply wrote it out and then wrote out what I thought the steps were. After that everything fell into place pretty smoothly. Some problems with binary switches were about the worst of it (see the sidebar).

Switches of Doom

There have been several times during my work today that I acidentally clicked on a binary switch that wasn't supposed to be changed.

When you click once on a binary switch and the simulation is paused, the switch doesn't change until the next simulation step. So I would unpause the simulation later and then have all sorts of problems because some switch somewhere had been flipped by accident.

I finally got fed up and made BinaryOne and BinaryZero. Tiny devices that do nothing but output a constant zero or one.

GOAL: If the the Q6 line from the instruction decoder "mach" is true (which corresponds to the op-code LDG), then we should load the 16-bit word into GREG (General Register) that is located at the address given along with the opcode.

STEPS:
1. put the given address on the bus and load into MAR
2. send MAR, thereby sending the data at [MAR] address of PROM into MBR
3. send MBR (onto the main bus) and load into GREG

Along the way I added two extra buses and built a sort of I/O console around the power switch for diagnostic purposes.

I constructed a 12-bit buffer for holding the address that comes with a giving opcode and placing it on the main bus as necessary.

For installing this buffer and wiring the general register into place I made two changes. First, I didn't install a zero register to blank the top 4 bits because I didn't see a reason for it (maybe it's needed later?) Second, I shared the IR output to the decoder and buffer using a bus instead of a messy grid of lines. I already had the bus in place for part of my diagnostic console. It was the "opcode display bus" but I renamed it the "command bus".


 


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